High performance cars and FPGAs? - Commonality is much more than you think

It was considered the "muscle car" era in the 1960s and early 1970s. This started with a large engine designed for mid-end cars. The most famous examples include Chevelles, Fairlanes, GTO, 442, Chargers and Roadrunners. During the same period, Ford Mustang began to develop "Pony Cars", which quickly attracted competition, such as Camaro, Firebird, Barracuda, AMX and Challenger. At that time, the size of the engine was expressed in cubic inches, and it was obvious that the engine on the car could be seen. Numbers such as "396", "429", "440" or "455" represent the level of performance.

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The most legendary of these engines is the 426 Hemi. Since its introduction in 1964, the engine has developed the first, second, third and fourth generations. After NASCAR restricted it, it became famous. From 1966 until 1971, compliance with NASCAR's approval clauses, or product quality manufacturing requirements, prompted the famous "Street Hemi" to be marketed, and some Dodge and Plymouth adopted it.

The Hemi engine has a displacement of 7 litres and features a high-speed cylinder with two basketball-sized 4-cylinder carburetor and a very conservative 425 hp rating. Few cars can match Cidas and Challengers with Hemi; perhaps only 427 Corvette can match.

The age of muscle cars has continued to this day, and the choice of models is becoming more and more limited. The price is acceptable, and most consumers can afford Camaro, Mustang, Corvette, Challenger or Charger. These cars have V8 engines, 400+ hp, 600-700 hp engines and other options.

Today's FPGA manufacturers are doing similar competition, which is very good for FPGA customers. In the past few years, almost all performance metrics have been increasing in terms of logic density, memory capacity, DSP blocks, transceiver speed and quantity. Of course, readers are no strangers to this.

A comparison is how to achieve these properties, which is the connection between theory and reality. Back to the original muscle car era, there are both hand and automatic. A loyal fan of choice chose a hand block. In the hands of a good driver, the 4-speed hand block is obviously better than the inefficient 3-speed automatic block. The hand block is also more fuel efficient, but I didn't care much about it at the time.

However, for modern muscle cars, the opposite is true. Automatic gear uses electronic control instead of oil pressure control. The speed of shifting is on the order of 100-200ms, which is much faster than people, and the same is true for speed matching. Electronic controls help the driver prevent the wheels from slipping. The shift paddles are used to select your own gear, although it is difficult to improve performance. Automatic gear is now also very fuel efficient, which is very important today. The relative number of gears is now reversed. For example, the current Dodge Challenger has an 8-speed automatic and a 6-speed manual transmission. Of course, many purists like the direct feeling of traditional or manual shifting, or like hand block. But this is no longer related to improving performance.

For FPGAs, there is the same trend, but it is not so well known. Traditionally, FPGAs have been manually programmed in Verilog or VHDL. Using fixed-point (integer) digital representations, the programmer decides on the underlying implementation, for example, when to insert pipeline registers. Even if the synthesis and adapter tools are all auto-completed, the quality of the final design will depend on the skill level of the FPGA programmer.

The new FPGA architecture is beginning to change these. For example, today's Altera Arria 10 FPGAs have a single-precision floating-point engine built into thousands of DSP blocks. With floating point, FPGA programmers do not have to determine bit width, truncation, and saturation levels after each digital operation, greatly simplifying programming tasks. Floating point numbers are represented and implemented to automate these tasks. Integers are now reserved for common functions such as loop counts, state machines, and memory indexes. This establishes a direct path between algorithm simulation and implementation, maintaining consistency between the system and the FPGA engineer.

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Supporting the implementation of these features using traditional Verilog and VHDL design flows will continue to dominate the FPGA design process. However, there are other design processes. OpenCL is the language of GP-GPU programmers and is now optimized for FPGAs to provide a true "button-on" compilation experience.

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With a model-based design, designers can stay in the Mathworks environment and get the best results, as evidenced by many complex high-throughput reference designs.

Similar to the hand block, FPGA designers can still choose to design and optimize as before, and the traditional design will work as before. However, FPGA designers will find that new automated methods can achieve the same or even better results. Moreover, with the rapid growth of logic density, many engineers will find that they do not have enough time to manually optimize large-scale FPGA designs as before. Just like high-performance muscle cars, in the FPGA world, you should start to take advantage of automation.

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