The 74LS192 is a synchronous decimal reversible counter with dual clock inputs and features such as clear and set. The pinouts and logic symbols are as follows:
Figure 5-4 Pinouts and Logical Symbols of the 74LS192 (a) Pin Arrangement (b) In the logical symbol diagram:
As the number of terminals,
To add up the count,
To count down,
For the non-synchronous carry output,
For the asynchronous borrowing output, P0, P1, P2, and P3 are counter inputs.
For the clear end, Q0, Q1, Q2, and Q3 are data outputs. Its function table is as follows: Input and output MR
P3P2P1P0Q3Q2Q1Q01×××××××000000××dcbadcba011×××× The count is 011××××.
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